EDN: EDN's 19th Annual Innovation Awards Finalists
Category: ASSPs
Finalist: T1000 single-chip content-inspection processor (LSI)
LSI’s T1000 single-chip, content-processing solution provides 3-Gbps deep packet inspection in security and service-provider billing and routing applications. The T1000 has two modes of operation. It can be RAMless, using host memory to store rules and cross-packet information, or it can operate using a low-cost DDR2 RAM, improving the number of rules supported and reducing latency. By replacing 11 chips, the smaller-footprint device reduces systems costs from $750 down to $120 and reduces power consumption by 66%. Scaling from 250 Mbps to 3 Gbps using the same package and pin layout and the same software and API, the T1000 also feature compatibility with the 10-Gbps T2000.
The T1000’s innovative features include a streaming interface and operation requiring almost no CPU input. The chip requires the applications to write control and data information in main memory and simply signal the T1000. The chip’s onboard DMA controller pulls the data from memory and scans it. Suiting use for multicore processors, this mode prevents different cores from being forced to wait for a resource to be freed. The device automatically handles cross-packet inspection in hardware by finding the start of a relevant pattern and remembering where it left off when the next packet in the stream arrives. The T1000 is capable of handling hundreds of thousands of simultaneous streams.
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